![Liu Liu](/sites/default/files/styles/large/public/2023-02/Liu-Liu.jpeg?itok=XW3rdl66)
Assistant Professor, Electrical, Computer, and Systems Engineering
Domain-specific architecture and system design for AI and Machine Learning with emphasis on near-data processing, in-network processing, and co-optimized design using approximate / low-precision computing
Lin, J., Liang, L., Qu, Z., Ahmad, I., Liu, L., Tu, F., Gupta, T., Ding, Y., Xie Y., (2022), “INSPIRE: IN-Storage Private Information REtrieval via Protocol and Architecture Co-design”, Proceedings - International Symposium on Computer Architecture, pp.102-115.
Wang, B., Deng, L., Sun, F., Dai, G., Liu, L., Wang, Y., Xie, Y. (2022), “A One-for-All and O(V log(V ))-Cost Solution for Parallel Merge Style Operations on Sorted Key-Value Arrays” International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, pp.669-682.
Qu, Z., Liu, L., Tu, F., Chen, Z., Ding, Y., Xie, Y. (2022) “DOTA: Detect and OmitWeak Attentions for Scalable Transformer Acceleration”, International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, pp.14-26.
Tu, F., Wu, Z., Wang, Y., Liang, L., Liu, L., Ding, Y., Liu, L., Wei,S., Xie, Y., Yin, S. (2022), “A 28nm 15.59J/Token Full-Digital Bitline-Transpose CIM-Based Sparse Transformer Accelerator with Pipeline/Parallel Reconfigurable Modes Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 2022-February, pp.466-468.
Chen, Z., Qu, Z., Liu, L., Ding, Y., Xie, Y. (2021) “Efficient tensor core-based gpu kernels for structured sparsity under reduced precision, International Conference for High Performance Computing, Networking, Storage and Analysis, SC.