Professor of Practice, Electrical, Computer, and Systems Engineering
Joined from Globalfoundries where he served as a Senior Director in Technology Program for 14nm FINFET and CHIPS Act initiatives, Muhsin Celik leads the workforce development for semiconductor manufacturing at RPI.
“Tunneling Field Effect Transistor (TFET) Having a Semiconductor Fin Structure.” US PTO No: 0322479 issued on 11/3/2016.
“Separately strained N-channel and P-channel transistors”. US PTO No:7041576 issued on 5/9/2006. Also filed as an International Patent.
“A 10nm platform technology for low power and high-performance application featuring FINFET devices with multi work function gate stack on bulk and SOI” Seo, K. et al. 2014 Symp. on VLSI Technology Digest of Technical Papers, Pages: 14-15.
“14nm FDSOI technology for high speed and energy efficient application” Weber O et al. 2014 Symposium on VLSI Technology Digest of Technical Papers, Pages: 16-17.
“High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond” Liu, Q. et al. 2013 International Electron Devices Meeting Digest of Technical Papers. Pages: 9.2.1-4.